Electronics For You

Ferroelectric Memory Powers AI Chips

Researchers have demonstrated a ferroelectric memory chip that performs both random sampling and AI computation, paving the ...
IEEE

A 2941-TOPS/W Charge-Domain 10T SRAM Compute-in-Memory for Ternary Neural Network

Abstract: In this paper, we present a 10T SRAM compute-in memory (CiM) macro to process the multiplication-accumulation (MAC) operations between ternary-inputs and binary-weights. In the proposed 10T ...
IEEE

Exploiting Locality in Sparse Matrix-Matrix Multiplication on Many-Core Architectures

Abstract: Exploiting spatial and temporal localities is investigated for efficient row-by-row parallelization of general sparse matrix-matrix multiplication (SpGEMM) operation of the form C=AB on many ...
Design And Reuse

Building the Digital Cockpit: From Hardware to AI

In this context, the digital cockpit has become the primary human–machine interface (HMI), integrating instrument clusters, ...
Tech Times

Fault-Tolerant Quantum Simulation Overhead Falls 250×: QuEra Architecture Needs Just 1,500 Qubits

Fault-tolerant quantum simulation just got 250 times cheaper to run. QuEra Computing and Los Alamos published an architecture ...